DOI: https://doi.org/10.36347/sjet.2025.v13i04.001

Pages: 199-207

New generation of embedded systems with superior intelligence, energy efficiency, and performance have emerged as a result of the merging of deep learning with Very-Large-Scale Integration (VLSI) technology. Methodologies for design, optimisation strategies, and practical uses of next-generation embedded systems are the foci of this study, which investigates the ways in which VLSI and deep learning might work together. These systems have the potential to transform several industries, such as transportation, medicine, robotics, and the IoT, by harnessing the processing power of deep neural networks with the improvements in semiconductor fabrication. Prior to delving into the advantages of bespoke hardware design for deep learning inference and training, we trace the history of very large scale integration (VLSI) technology and its incorporation with deep learning algorithms. Investigated here are the design techniques that, when applied to very large scale integration (VLSI) architectures like FPGAs and ASICs, allow for the efficient mapping of deep learning models onto these devices. We show case studies that show how these methods work and talk about the trade-offs between performance, power consumption, and adaptability. The development of next-generation embedded systems relies heavily on optimisation approaches. Model compression, quantisation, and pruning are some of the optimisation strategies that we examine; they lessen the memory and computational demands of deep learning models without drastically altering their accuracy. For embedded devices with limited resources, these methods are crucial for implementing deep learning models. Additionally, we explore the practical uses of embedded systems augmented with VLSI and deep learning. By capitalising on the complementary strengths of VLSI and deep learning, applications like autonomous driving, medical imaging, and smart home automation are revolutionising entire industries. In this paper, we examine the desig